OpenTwin 0.1
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InstructionSet.h
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1#pragma once
2#include <iostream>
3#include <vector>
4#include <bitset>
5#include <array>
6#include <string>
7#include <intrin.h>
8
9//Source: https://docs.microsoft.com/de-de/cpp/intrinsics/cpuid-cpuidex?view=msvc-170
11{
12public:
14 : nIds_{ 0 },
15 nExIds_{ 0 },
16 isIntel_{ false },
17 isAMD_{ false },
18 f_1_ECX_{ 0 },
19 f_1_EDX_{ 0 },
20 f_7_EBX_{ 0 },
21 f_7_ECX_{ 0 },
22 f_81_ECX_{ 0 },
23 f_81_EDX_{ 0 },
24 data_{},
25 extdata_{}
26 {
27 //int cpuInfo[4] = {-1};
28 std::array<int, 4> cpui;
29
30 // Calling __cpuid with 0x0 as the function_id argument
31 // gets the number of the highest valid function ID.
32 __cpuid(cpui.data(), 0);
33 nIds_ = cpui[0];
34
35 for (int i = 0; i <= nIds_; ++i)
36 {
37 __cpuidex(cpui.data(), i, 0);
38 data_.push_back(cpui);
39 }
40
41 // Capture vendor string
42 char vendor[0x20];
43 memset(vendor, 0, sizeof(vendor));
44 *reinterpret_cast<int*>(vendor) = data_[0][1];
45 *reinterpret_cast<int*>(vendor + 4) = data_[0][3];
46 *reinterpret_cast<int*>(vendor + 8) = data_[0][2];
47 vendor_ = vendor;
48 if (vendor_ == "GenuineIntel")
49 {
50 isIntel_ = true;
51 }
52 else if (vendor_ == "AuthenticAMD")
53 {
54 isAMD_ = true;
55 }
56
57 // load bitset with flags for function 0x00000001
58 if (nIds_ >= 1)
59 {
60 f_1_ECX_ = data_[1][2];
61 f_1_EDX_ = data_[1][3];
62 }
63
64 // load bitset with flags for function 0x00000007
65 if (nIds_ >= 7)
66 {
67 f_7_EBX_ = data_[7][1];
68 f_7_ECX_ = data_[7][2];
69 }
70
71 // Calling __cpuid with 0x80000000 as the function_id argument
72 // gets the number of the highest valid extended ID.
73 __cpuid(cpui.data(), 0x80000000);
74 nExIds_ = cpui[0];
75
76 char brand[0x40];
77 memset(brand, 0, sizeof(brand));
78
79 for (int i = 0x80000000; i <= nExIds_; ++i)
80 {
81 __cpuidex(cpui.data(), i, 0);
82 extdata_.push_back(cpui);
83 }
84
85 // load bitset with flags for function 0x80000001
86 if (nExIds_ >= 0x80000001)
87 {
88 f_81_ECX_ = extdata_[1][2];
89 f_81_EDX_ = extdata_[1][3];
90 }
91
92 // Interpret CPU brand string if reported
93 if (nExIds_ >= 0x80000004)
94 {
95 memcpy(brand, extdata_[2].data(), sizeof(cpui));
96 memcpy(brand + 16, extdata_[3].data(), sizeof(cpui));
97 memcpy(brand + 32, extdata_[4].data(), sizeof(cpui));
98 brand_ = brand;
99 }
100 };
101
102 int nIds_;
104 std::string vendor_;
105 std::string brand_;
107 bool isAMD_;
108 std::bitset<32> f_1_ECX_;
109 std::bitset<32> f_1_EDX_;
110 std::bitset<32> f_7_EBX_;
111 std::bitset<32> f_7_ECX_;
112 std::bitset<32> f_81_ECX_;
113 std::bitset<32> f_81_EDX_;
114 std::vector<std::array<int, 4>> data_;
115 std::vector<std::array<int, 4>> extdata_;
116};
117
119{
120public:
121 // getters
122 std::string Vendor(void) { return CPU_Rep.vendor_; }
123 std::string Brand(void) { return CPU_Rep.brand_; }
124
125 bool SSE3(void) { return CPU_Rep.f_1_ECX_[0]; }
126 bool PCLMULQDQ(void) { return CPU_Rep.f_1_ECX_[1]; }
127 bool MONITOR(void) { return CPU_Rep.f_1_ECX_[3]; }
128 bool SSSE3(void) { return CPU_Rep.f_1_ECX_[9]; }
129 bool FMA(void) { return CPU_Rep.f_1_ECX_[12]; }
130 bool CMPXCHG16B(void) { return CPU_Rep.f_1_ECX_[13]; }
131 bool SSE41(void) { return CPU_Rep.f_1_ECX_[19]; }
132 bool SSE42(void) { return CPU_Rep.f_1_ECX_[20]; }
133 bool MOVBE(void) { return CPU_Rep.f_1_ECX_[22]; }
134 bool POPCNT(void) { return CPU_Rep.f_1_ECX_[23]; }
135 bool AES(void) { return CPU_Rep.f_1_ECX_[25]; }
136 bool XSAVE(void) { return CPU_Rep.f_1_ECX_[26]; }
137 bool OSXSAVE(void) { return CPU_Rep.f_1_ECX_[27]; }
138 bool AVX(void) const { return CPU_Rep.f_1_ECX_[28]; }
139 bool F16C(void) { return CPU_Rep.f_1_ECX_[29]; }
140 bool RDRAND(void) { return CPU_Rep.f_1_ECX_[30]; }
141
142 bool MSR(void) { return CPU_Rep.f_1_EDX_[5]; }
143 bool CX8(void) { return CPU_Rep.f_1_EDX_[8]; }
144 bool SEP(void) { return CPU_Rep.f_1_EDX_[11]; }
145 bool CMOV(void) { return CPU_Rep.f_1_EDX_[15]; }
146 bool CLFSH(void) { return CPU_Rep.f_1_EDX_[19]; }
147 bool MMX(void) { return CPU_Rep.f_1_EDX_[23]; }
148 bool FXSR(void) { return CPU_Rep.f_1_EDX_[24]; }
149 bool SSE(void) { return CPU_Rep.f_1_EDX_[25]; }
150 bool SSE2(void) { return CPU_Rep.f_1_EDX_[26]; }
151
152 bool FSGSBASE(void) { return CPU_Rep.f_7_EBX_[0]; }
153 bool BMI1(void) { return CPU_Rep.f_7_EBX_[3]; }
154 bool HLE(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_7_EBX_[4]; }
155 bool AVX2(void) const { return CPU_Rep.f_7_EBX_[5]; }
156 bool BMI2(void) { return CPU_Rep.f_7_EBX_[8]; }
157 bool ERMS(void) { return CPU_Rep.f_7_EBX_[9]; }
158 bool INVPCID(void) { return CPU_Rep.f_7_EBX_[10]; }
159 bool RTM(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_7_EBX_[11]; }
160 bool AVX512F(void) const { return CPU_Rep.f_7_EBX_[16]; }
161 bool RDSEED(void) { return CPU_Rep.f_7_EBX_[18]; }
162 bool ADX(void) { return CPU_Rep.f_7_EBX_[19]; }
163 bool AVX512PF(void) { return CPU_Rep.f_7_EBX_[26]; }
164 bool AVX512ER(void) { return CPU_Rep.f_7_EBX_[27]; }
165 bool AVX512CD(void) { return CPU_Rep.f_7_EBX_[28]; }
166 bool SHA(void) { return CPU_Rep.f_7_EBX_[29]; }
167
168 bool PREFETCHWT1(void) { return CPU_Rep.f_7_ECX_[0]; }
169
170 bool LAHF(void) { return CPU_Rep.f_81_ECX_[0]; }
171 bool LZCNT(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_ECX_[5]; }
172 bool ABM(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[5]; }
173 bool SSE4a(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[6]; }
174 bool XOP(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[11]; }
175 bool TBM(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_ECX_[21]; }
176
177 bool SYSCALL(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_EDX_[11]; }
178 bool MMXEXT(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[22]; }
179 bool RDTSCP(void) { return CPU_Rep.isIntel_ && CPU_Rep.f_81_EDX_[27]; }
180 bool _3DNOWEXT(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[30]; }
181 bool _3DNOW(void) { return CPU_Rep.isAMD_ && CPU_Rep.f_81_EDX_[31]; }
182
183private:
184 const InstructionSet_Internal CPU_Rep;
185};
Definition InstructionSet.h:11
std::bitset< 32 > f_1_ECX_
Definition InstructionSet.h:108
std::bitset< 32 > f_7_ECX_
Definition InstructionSet.h:111
int nExIds_
Definition InstructionSet.h:103
std::vector< std::array< int, 4 > > extdata_
Definition InstructionSet.h:115
int nIds_
Definition InstructionSet.h:102
bool isIntel_
Definition InstructionSet.h:106
std::bitset< 32 > f_81_EDX_
Definition InstructionSet.h:113
std::bitset< 32 > f_81_ECX_
Definition InstructionSet.h:112
std::vector< std::array< int, 4 > > data_
Definition InstructionSet.h:114
std::string brand_
Definition InstructionSet.h:105
std::bitset< 32 > f_1_EDX_
Definition InstructionSet.h:109
std::bitset< 32 > f_7_EBX_
Definition InstructionSet.h:110
std::string vendor_
Definition InstructionSet.h:104
InstructionSet_Internal()
Definition InstructionSet.h:13
bool isAMD_
Definition InstructionSet.h:107
Definition InstructionSet.h:119
bool INVPCID(void)
Definition InstructionSet.h:158
bool SSE2(void)
Definition InstructionSet.h:150
bool CLFSH(void)
Definition InstructionSet.h:146
bool AVX512PF(void)
Definition InstructionSet.h:163
bool BMI1(void)
Definition InstructionSet.h:153
bool FXSR(void)
Definition InstructionSet.h:148
bool AVX512F(void) const
Definition InstructionSet.h:160
bool MSR(void)
Definition InstructionSet.h:142
bool PREFETCHWT1(void)
Definition InstructionSet.h:168
bool LZCNT(void)
Definition InstructionSet.h:171
bool RDSEED(void)
Definition InstructionSet.h:161
bool F16C(void)
Definition InstructionSet.h:139
bool AVX2(void) const
Definition InstructionSet.h:155
bool TBM(void)
Definition InstructionSet.h:175
bool AVX(void) const
Definition InstructionSet.h:138
bool ADX(void)
Definition InstructionSet.h:162
bool SSE42(void)
Definition InstructionSet.h:132
std::string Vendor(void)
Definition InstructionSet.h:122
bool CMPXCHG16B(void)
Definition InstructionSet.h:130
bool AVX512ER(void)
Definition InstructionSet.h:164
bool FMA(void)
Definition InstructionSet.h:129
bool OSXSAVE(void)
Definition InstructionSet.h:137
bool AES(void)
Definition InstructionSet.h:135
bool CX8(void)
Definition InstructionSet.h:143
bool RDRAND(void)
Definition InstructionSet.h:140
bool MMXEXT(void)
Definition InstructionSet.h:178
bool PCLMULQDQ(void)
Definition InstructionSet.h:126
bool HLE(void)
Definition InstructionSet.h:154
bool SYSCALL(void)
Definition InstructionSet.h:177
bool FSGSBASE(void)
Definition InstructionSet.h:152
bool RTM(void)
Definition InstructionSet.h:159
bool BMI2(void)
Definition InstructionSet.h:156
std::string Brand(void)
Definition InstructionSet.h:123
bool SSSE3(void)
Definition InstructionSet.h:128
bool _3DNOW(void)
Definition InstructionSet.h:181
bool AVX512CD(void)
Definition InstructionSet.h:165
bool POPCNT(void)
Definition InstructionSet.h:134
bool MONITOR(void)
Definition InstructionSet.h:127
bool LAHF(void)
Definition InstructionSet.h:170
bool MMX(void)
Definition InstructionSet.h:147
bool SSE41(void)
Definition InstructionSet.h:131
bool SSE(void)
Definition InstructionSet.h:149
bool SHA(void)
Definition InstructionSet.h:166
bool ABM(void)
Definition InstructionSet.h:172
bool XSAVE(void)
Definition InstructionSet.h:136
bool SEP(void)
Definition InstructionSet.h:144
bool CMOV(void)
Definition InstructionSet.h:145
bool MOVBE(void)
Definition InstructionSet.h:133
bool RDTSCP(void)
Definition InstructionSet.h:179
bool SSE3(void)
Definition InstructionSet.h:125
bool XOP(void)
Definition InstructionSet.h:174
bool SSE4a(void)
Definition InstructionSet.h:173
bool _3DNOWEXT(void)
Definition InstructionSet.h:180
bool ERMS(void)
Definition InstructionSet.h:157